Added support for additional DWT counters (#349)
- CPI counter
- Exception overhead counter
- LSU counter
- Folded-instruction counter
Added DWT.set_cycle_count (#347).
Added support for the Cortex-M7 TCM and cache access control registers.
There is a feature cm7 to enable access to these (#352).
Add derives for serde, Hash, and PartialOrd to VectActive behind feature
gates for host-platform use (#363).
Support host platforms besides x86_64 (#369).
Added delay::Delay::with_source, a constructor that lets you specify
the SysTick clock source (#374).

Fixed

Fix incorrect AIRCR PRIGROUP mask (#338, #339).
Fix nightly users of inline-asm breaking now that the asm macro is removed
from the prelude (#372).

Deprecated

DWT::get_cycle_count has been deprecated in favor of DWT::cycle_count.
This change was made for consistency with the C-GETTER convention. (#349)

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This PR has been generated by Renovate Bot.

This PR contains the following updates: | Package | Type | Update | Change | |---|---|---|---| | [cortex-m-rt](https://github.com/rust-embedded/cortex-m) | dependencies | patch | `0.7.3` → `0.7.5` | --- ### Release Notes <details> <summary>rust-embedded/cortex-m (cortex-m-rt)</summary> ### [`v0.7.5`](https://github.com/rust-embedded/cortex-m/releases/tag/v0.7.5) [Compare Source](https://github.com/rust-embedded/cortex-m/compare/v0.7.4...v0.7.5) ##### Deprecated - the `ptr()` function on all peripherals register blocks in favor of the associated constant `PTR` ([#386](https://github.com/rust-embedded/cortex-m/issues/386)). ##### Changed - The `inline-asm` feature no longer requires a nightly Rust compiler, but does require Rust 1.59 or above. ##### Fixed - Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` ([#364](https://github.com/rust-embedded/cortex-m/issues/364), [#380](https://github.com/rust-embedded/cortex-m/issues/380)). (Backported from upcoming 0.8 release). ### [`v0.7.4`](https://github.com/rust-embedded/cortex-m/releases/tag/v0.7.4) [Compare Source](https://github.com/rust-embedded/cortex-m/compare/v0.7.3...v0.7.4) #### v0.7.4 - 2021-12-31 ##### Added - Added support for additional DWT counters ([#349](https://github.com/rust-embedded/cortex-m/issues/349)) - CPI counter - Exception overhead counter - LSU counter - Folded-instruction counter - Added `DWT.set_cycle_count` ([#347](https://github.com/rust-embedded/cortex-m/issues/347)). - Added support for the Cortex-M7 TCM and cache access control registers. There is a feature `cm7` to enable access to these ([#352](https://github.com/rust-embedded/cortex-m/issues/352)). - Add derives for serde, Hash, and PartialOrd to VectActive behind feature gates for host-platform use ([#363](https://github.com/rust-embedded/cortex-m/issues/363)). - Support host platforms besides x86\_64 ([#369](https://github.com/rust-embedded/cortex-m/issues/369)). - Added `delay::Delay::with_source`, a constructor that lets you specify the SysTick clock source ([#374](https://github.com/rust-embedded/cortex-m/issues/374)). ##### Fixed - Fix incorrect AIRCR PRIGROUP mask ([#338](https://github.com/rust-embedded/cortex-m/issues/338), [#339](https://github.com/rust-embedded/cortex-m/issues/339)). - Fix nightly users of inline-asm breaking now that the asm macro is removed from the prelude ([#372](https://github.com/rust-embedded/cortex-m/issues/372)). ##### Deprecated - `DWT::get_cycle_count` has been deprecated in favor of `DWT::cycle_count`. This change was made for consistency with the [C-GETTER] convention. ([#349](https://github.com/rust-embedded/cortex-m/issues/349)) [C-GETTER]: https://rust-lang.github.io/api-guidelines/naming.html#c-getter </details> --- ### Configuration 📅 **Schedule**: Branch creation - At any time (no schedule defined), Automerge - At any time (no schedule defined). 🚦 **Automerge**: Disabled by config. Please merge this manually once you are satisfied. ♻ **Rebasing**: Whenever PR becomes conflicted, or you tick the rebase/retry checkbox. 🔕 **Ignore**: Close this PR and you won't be reminded about this update again. --- - [ ] If you want to rebase/retry this PR, check this box --- This PR has been generated by [Renovate Bot](https://github.com/renovatebot/renovate).

renovate added 1 commit

2026-03-22 17:42:10 +00:00